1. Field of the Invention
The invention in general relates to ferroelectric non-volatile memories, and in particular such a memory that is generally known as a ferroelectric static random access memory (SRAM).
2. Statement of the Problem
Static random access memories (SRAMs) are well-known in the art. SRAMs are referred to as “static”, because unlike dynamic RAMs (DRAMs) they do not have to be refreshed; they use an electronic latch which retains its memory state so long as electricity is applied to it. It is also significantly faster than a DRAM. However, like a DRAM, it is volatile and loses its data when electrical power is removed or lost.
Non-volatile SRAMs have been proposed. See, for example, U.S. Pat. No. 4,809,225, which is incorporated herein by reference to the same extent as though fully disclosed herein. In this type of memory, each memory cell includes a SRAM latch portion and a ferroelectric memory portion. The ferroelectric portion is non-volatile. The data held by the SRAM portion of the cell is transferred to the corresponding ferroelectric portion when the power is turned off or lost. When the power returns, the data held by the ferroelectric portion is transferred back to the SRAM latch. During normal SRAM operation, the ferroelectric portion is isolated from the SRAM latch portion to avoid ferroelectric fatigue.
While the volatile SRAMs have gained wide commercial acceptance for field stand-alone memories, cache memories, and programmable gate array (FPGA) applications, up until now non-volatile SRAMs have not been commercialized. This is due to the fact that the prior art non-volatile SRAMS have been susceptible to ferroelectric disturb. Ferroelectric disturb occurs when the reading and/or writing to one ferroelectric cell causes a small voltage to be applied to neighboring ferroelectric cells. While the small voltage is not sufficient to alter the memory states of the neighboring cells, it has been found in practice that many such small voltages can eventually cause loss of data. Disturb can also occur when one ferroelectric cell is connected to a ferroelectric cell having a different memory state for relatively long periods, which disturb was not anticipated by those skilled in the art. Since SRAMs typically may be off for relatively long periods, this latter disturb aspect has been particularly a problem in the prior art non-volatile SRAM memories. Thus, a memory that was intended to be extremely reliable turned out not to be very reliable in practice. Thus, it would be highly desirable to have a non-volatile SRAM that was not susceptible to ferroelectric disturb and, as a result, was highly reliable.